This invention relates to integrated circuit packages in general, and specifically to surface mount area-array packages.
Advances in the design of integrated circuit dies have created a demand for integrated circuit package designs which can accommodate a large number of interconnections between the package and the substrate without becoming excessively large. An important requirement of these high density integrated circuit package designs is that they maintain a low interconnection failure rate despite the large number of interconnections.
One such high density package design is a surface mount area-array package. This package does not employ formed metal leads. Instead, interconnection between the package and the substrate is provided by an array of metal alloy or electrically conductive polymer based compound terminations which form joints to mechanically and electrically connect the package and the substrate
One type of such package is a plastic ball grid array (PBGA) package. The substrate of the package is composed of a laminated glass fibre resin structure which has metal traces on the outside and between the laminated layers and vias to interconnect the traces. An integrated circuit die is positioned on top of or adjacent the top of the package substrate and electrically connected to the traces. Through the vias, these traces connect to solder balls typically arrayed in regular concentric rings, usually square in shape, upon the bottom of the PBGA package. The integrated circuit die and the top of the substrate are encapsulated in a molded plastic for mechanical and environmental protection. The PBGA package is mounted upon a substrate employing known procedures such as reflow.
It was known that the solder ball interconnections beneath the integrated circuit die were the first to fail in operation when the PBGA was mounted upon the most commonly used substrate, namely a printed circuit board (PCB) formed with a laminated glass fibre resin based material. A prior solution for attempting to increase electrical reliability was to remove the interconnections which were beneath the die, know in the art as depopulating solder balls. However, this decreases the number of solder ball joints attaching the package to the substrate. The mechanical problem created, of not having sufficient attachment of the package to the substrate, is particularly significant in chip-scale packages (CSP""s). A CSP is any package in which the package is only slightly larger than the die.
In Factors Influencing Fatigue Life of Area-Array Solder Joints, by R. Katchmar, E. Goulet and J. Laliberte, presented at 1996 ISHM in Minneapolis, the authors described a process by which they developed a formula for predicting the incremental spring stiffness xcex94Ki of the ith ring of solder balls from the centre of the package. As a result of applying this formula to PBGAs mounted on printed circuit boards, it was theorized that the solder balls under the die should be retained, rather than removed, in order to extend the life of the remaining solder ball connections. However, the formulas published in the paper contained errors; in particular, the formula for calculating xcex94Ki was incorrect. Also, no practical solutions have been proposed and the paper is silent with regard to ceramic column grid array (CCGA) packages and CSP""s.
It is an object of the present invention to provide an improved integrated circuit package and method of connecting an integrated circuit package to a substrate in which one or more of the disadvantages of the prior art is obviated or mitigated.
Therefore, the invention may be summarized according to a first broad aspect as an integrated circuit package for mounting on a substrate of local coefficient of thermal expansion xcex1s comprising: a package substrate of local coefficient of thermal expansion xcex1pkg; a semiconductor die mounted either on or adjacent a top surface of the package substrate and electrically connected thereto; an array of conductive surface mount terminations of finite thickness mounted on a bottom surface of the package substrate at least some of which are connected through the package substrate to the semiconductor die; the terminations being arranged in rings i around a neutral point of the package; each of the rings being a distance DNPi from the neutral point of the package; each of the rings having a number of terminations ni; each ring having a termination pitch P; the terminations having a modulus of elasticity Et and a structural thickness ht; the package having a modulus of elasticity Epkg and a structural thickness hpkg; successive rings having a change in the distance from the neutral point of the package xcex94DNP; each of the rings cycling through a temperature range xcex94Ti during operation; and at least one adhesive mass; the at least one adhesive mass being located on the bottom of the package substrate in the area(s) where the terminations when mounted upon the substrate to form joints would have highest joint strain energy density WGi as calculated by the equations
WGi=ki{DNPi(xcex1sxe2x88x92xcex1pkg)ixcex94Ti}2
xe2x80x83ki=xc2xcnixcexa3(1/xcex94Kj)j=1,i
xcex94Kj=(P/xcex94DNP)j/{1/(Eh)t+1/(Eh)pkg}j
such that when mounted upon the substrate the at least one adhesive mass will co-operate with the package substrate and the substrate to adhere the package substrate and the substrate to each other.
According to another aspect of the present invention, there is provided an integrated circuit package for mounting on a substrate comprising: a package substrate; a semiconductor die mounted either on or adjacent a top surface of the package substrate and electrically connected thereto; an array of conductive surface mount terminations of finite thickness mounted on a bottom surface of the plastic package substrate at least some of which are connected through the package substrate to the semiconductor die; and at least one adhesive mass; the at least one adhesive mass being located on the bottom of the package substrate such that when mounted upon the substrate the at least one adhesive mass will co-operate with the package substrate and the substrate to adhere the package substrate and the substrate to each other.
According to a further aspect of the present invention, there is provided an integrated circuit package for mounting on a substrate comprising: a plastic package substrate having a coefficient of thermal expansion substantially the same as the coefficient of thermal expansion of the substrate; a semiconductor die mounted either on or adjacent a top surface of the plastic package substrate and electrically connected thereto; an array of conductive surface mount terminations of finite thickness mounted on a bottom surface of the plastic package substrate at least some of which are connected through the plastic package substrate to the semiconductor die; and an adhesive mass; the adhesive mass being located on the bottom of the plastic package substrate substantially beneath the semiconductor die such that when mounted upon the substrate the adhesive mass will co-operate with the plastic package substrate and the substrate to adhere the package substrate and the substrate to each other.
According to a further aspect of the present invention, there is provided an integrated circuit package for mounting on a substrate comprising: a ceramic package substrate having a coefficient of thermal expansion substantially lower than the coefficient of thermal expansion of the substrate; a semiconductor die mounted either on or adjacent a top surface of the ceramic package substrate and electrically connected thereto; an array of conductive surface mount terminations of finite thickness mounted on a bottom surface of the substrate at least some of which are connected through the substrate to the semiconductor die; a plurality of adhesive masses; the adhesive masses being located on the bottom of the ceramic package substrate at the corners of the ceramic package substrate such that when mounted upon the substrate the adhesive masses will cooperate with the ceramic package""substrate and the substrate to adhere the ceramic package substrate and the substrate to each other.
According to yet another aspect, there is provided a method of mounting an integrated circuit package on a substrate for electrical connection of an array of conductive surface mount terminations on the package to the substrate comprising: applying an adhesive mass to a bottom surface of the package; aligning and attaching the array of conductive surface mount terminations and the adhesive mass to the substrate; and fixing the adhesive mass.
According to a still further aspect, there is provided a method of mounting on a substrate a plastic ball grid array package having a package substrate carrying a semiconductor die, the package substrate having a coefficient of thermal expansion substantially the same as the coefficient of thermal expansion of the substrate, the method comprising: providing the plastic ball grid array package with a plurality of solder balls on a bottom surface of the package substrate at locations other than under the semiconductor die; providing the plastic ball grid array package with a solderable pad on the bottom surface of the package substrate under the semiconductor die; providing the substrate with a solderable pad on a top surface under the area where the semiconductor die will be positioned; applying a solder mass, substantially equal in thickness to the solder balls, on the pad on the plastic ball grid array; applying a flux means to the substrate; aligning and placing the plastic ball grid array package on the substrate; and reflowing the solder.
According to another aspect, there is provided a method of mounting on a substrate a plastic ball grid array package having a package substrate carrying a semiconductor die, the package substrate having a coefficient of thermal expansion substantially the same as the coefficient of thermal expansion of the substrate, the method comprising: providing the plastic ball grid array package with a plurality of solder balls on a bottom surface of the package substrate at locations other than under the semiconductor die; applying a flux means to the substrate; aligning and placing the plastic ball grid array package on the substrate; reflowing the solder; injecting an adhesive plastic mass between the package substrate and the substrate under the area where the semiconductor die is located; curing the adhesive plastic mass.
According to another aspect, there is provided a method of mounting on a substrate a plastic ball grid array package having a package substrate carrying a semiconductor die, the package substrate having a coefficient of thermal expansion substantially the same as the coefficient of thermal expansion of the substrate, the method comprising: providing the plastic ball grid array package with a plurality of solder balls on a bottom surface of the package substrate; applying a flux means to the substrate; aligning and placing the plastic ball grid array package on the substrate; reflowing the solder; injecting an non-electrically conductive adhesive plastic mass between the package substrate and the substrate; curing the adhesive plastic mass.
According to a still further aspect, there is provided a method of mounting on a substrate a ceramic surface mount area-array package having a package substrate carrying a semiconductor die, the package substrate having a coefficient of thermal expansion substantially lower than the coefficient of thermal expansion of the substrate, the method comprising: providing the ceramic surface mount area-array package with an array of solderable surface mount terminations on a bottom surface of the package substrate at locations other than the corners of the package substrate; providing the ceramic surface mount area-array package with solderable pads on the bottom surface of the package substrate at the corners of the package substrate; providing the substrate with a solderable pads on a top surface under the area where the corners of the package substrate will be positioned; applying solder masses, substantially equal in thickness to the solderable surface mount terminations, on the pads on the ceramic ball grid array; applying a flux means to the substrate; aligning and placing the ceramic surface mount area-array package on the substrate; and reflowing the solder.
According to yet another aspect, there is provided a method of mounting on a substrate a ceramic surface mount area-array package having a package substrate carrying a semiconductor die, the package substrate having a coefficient of thermal expansion substantially lower than the coefficient of thermal expansion of the substrate, the method comprising: providing the ceramic surface mount area-array package with an array of solderable surface mount terminations on a bottom surface of the package substrate at locations other than the corners of the package substrate; applying a flux means to the substrate; aligning and placing the ceramic surface mount area-array package on the substrate; reflowing the solder; injecting adhesive plastic masses between the package substrate and the substrate under the areas where the corners of the package substrate will be positioned; curing the adhesive plastic masses.
According to yet another aspect, there is provided an integrated circuit package for, mounting on a substrate comprising: a package substrate; a semiconductor die mounted either on or adjacent a top surface of the package substrate and electrically connected thereto; an array of conductive surface mount terminations of finite thickness mounted on a bottom surface of the package substrate at least some of which are connected through the package substrate to the semiconductor die; and at least one adhesive mass; the at least one adhesive mass being located on the bottom of the package substrate in the area(s) where the terminations when mounted upon the substrate to form joints would have highest joint strain energy density as calculated by numerical methods such that when mounted upon the substrate the at least one adhesive mass will co-operate with the package substrate and the substrate to adhere the package substrate and the substrate to each other.
An advantage of this invention is that it mechanically stabilizes the area-array package from handling and bending stresses of the substrate during installation.
Another advantage of this invention is that it makes the assembly more robust to heat-sink attachment forces.
Yet another advantage is that the invention provides for an alternative cooling path into the substrate, since it directly couples the device package to the substrate which may act as a heat sink.
A further advantage of this invention is that it increases the other solder joint fatigue life due to temperature cycling of environmental or equipment temperature.
Finally, the invention provides for easy manufacture as the solder mass is concurrently soldered or unsoldered with all other joints.